Packaged semiconductor devices are affected by exposure to environment, particularly moisture. The semiconductor devices typically include dielectric materials on various surfaces, which may be permeable or otherwise may crack or become defective, enabling moisture to penetrate the electrical circuits. The moisture may cause short circuits, as well as disintegrate the components within the packaged semiconductor device.
FIG. 1 shows a cross-sectional view of an end portion of a conventional semiconductor structure 100, including an illustrative moisture path. The semiconductor structure 100 comprises substrate 101, which includes a collector 102 formed therein by known methods. A base 103 is provided over the collector 102, and an emitter 104 is provided over the collector 102 to provide an active semiconductor device, such as a heterojunction bipolar transistor (HBT).
Contacts 105 are made to the base layer 103 and the collector layer 102. A first metal layer 106 is provided on the contacts 105 and the emitter layer 104. A second metal layer 107 is provided on the first metal layer 106. The first metal layer 106 and the second metal layer 107 are used for routing signals to and from the HBT. A protective dielectric layer is provided on the second metal layer 107, the protective dielectric layer comprising a first dielectric layer 121 and a second dielectric layer 122 formed on a planar top surface of the first dielectric layer 121. The first and second dielectric layers 121 and 122 provide isolation and limited protection of the HBT, and may be formed of silicon nitride and benzocyclobutene (BCB), respectively. A base dielectric layer 108 formed of BCB or polyimide, for example, is provided beneath the first dielectric layer 121 and provides a planar surface on which the first dielectric layer 121 is formed.
The first metal layer 106 is selectively disposed over the contacts 105 to the base 103 and the collector 102, and over the emitter 104, and the second metal layer 107 is selectively disposed over the first metal layer 106. The second metal layer 107 may include signal traces, such as trace 107A, for carrying electrical signals to and from the collector 102 and electrical ground traces for connection to the emitter 104. In addition, collector Vcc bias structure 115 is shown between the outermost HBT and the outer edge 144 of the base dielectric layer 108. The collector Vcc bias structure 115 includes trace 107E of the second metal layer 107 stacked on trace 106E of the first metal layer 106.
Edge and top portions of the semiconductor structure 100 are exposed to moisture, indicated generally by illustrative moisture path 145. That is, moisture is able to penetrate the base dielectric layer 108, through the outer edge 144 and/or through the first and second dielectric layers 121 and 122. The moisture may be able to reach the HBT or other portions of the semiconductor structure 100, and cause electrical shorts, particularly if cracking or other defects exit in the base dielectric layer 108, or the first and second dielectric layers 121 and 122. There is a need, therefore, for a moisture barrier to prevent seepage of moisture, in order to prevent short circuits and other defects from occurring in the semiconductor structure.